A shift register unit used in a conventional low temperature poly-silicon technology adopts D flip-flops constituted by an inverter, a NAND gate and a transmission gate, and usually comprises two D flip-flops. An output signal is latched by the D flip-flops, and the transmission and shift of the signal is controlled by a clock signal.
For a typical existing shift register, it is mainly constituted by two D flip-flops, and its operation principle is as follows: when a first D flip-flop is switched on by a clock pulse of the clock signal, the level signal input from a previous stage of unit enters into the first D flip-flop, but the level signal cannot enter into a second D flip-flop since the transmission gate at the front end of the second D flip-flop is switched off at this time; when a next clock pulse of the clock signal comes, the first D flip-flop is switched off and latches its input signal (that is, the level signal), the second D flip-flop is switched on at this time, and the input signal enters into the second D flip-flop and is output by the second D flip-flop. Thereby, the shift operation of the level signal from a previous stage of unit to an adjacent next stage of unit can be achieved.
Since the implementation of the D flip-flop includes two transmission gates, an inverter and a NAND gate, and a conventional shift register requires two D flip-flops, the conventional shift register unit has the disadvantages that a lot of gate circuits are used, the circuit configuration is too complex, a large layout space is required, all of which is not helpful for achieving a narrow bezel of a display panel, although the conventional shift register unit is classic.